The semiconductor device industry has a continuous market driven need to reduce the size of devices such as transistors. Smaller transistors result in improved operational speed and clock rate, and reduced power requirements in both standby and operational modes. To reduce transistor size, the thickness of the silicon dioxide (SiO2) gate dielectric is reduced in proportion to the shrinkage of the gate length. For example, a metal-oxide-semiconductor field effect transistor (MOSFET) might use a 1.5 nm thick SiO2 gate dielectric for a gate length of less than 100 nm. Such physically thin gate dielectrics may be a potential reliability issue with gate leakage and breakdown problems in upcoming generations of smaller MOSFETs. Small, low power consuming, and more reliable integrated circuits (ICs) will likely be used in products such as processors, mobile telephones, and memory devices such as dynamic random access memories (DRAMs).
The semiconductor industry relies on the ability to scale the dimensions of its basic devices, such as the MOSFET, to achieve improved operational speed and power consumption. Device scaling includes scaling the gate dielectric, which has primarily been silicon dioxide (SiO2). A thermally grown amorphous SiO2 layer provides an electrically and thermodynamically stable material, where the interface of the SiO2 layer with underlying silicon provides a high quality interface with superior electrical isolation. However, increased scaling and other requirements in microelectronic devices have created reliability issues as the gate dielectric has become thinner. It has been proposed to form a gate dielectric by the use of materials with higher dielectric constants (k).
The semiconductor memory industry has a need for non volatile memory elements that do not lose the stored information in the memory when power is shut down. One method includes forming electrically floating gates between a control gate and the substrate. However, the need to form multiple levels of gate electrodes increases the cost of manufacture, and the electrically floating gates must be charged and discharged by means of tunneling currents and avalanche currents, which may be slow, require high programming voltages, and may have reliability problems. It has been proposed to use a dielectric material for the gate insulator that is affected by impressed signals.